
settimeofday:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400790 <_init>:
  400790:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400794:	910003fd 	mov	x29, sp
  400798:	94000048 	bl	4008b8 <call_weak_fn>
  40079c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4007a0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004007b0 <.plt>:
  4007b0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4007b4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf3b4>
  4007b8:	f947fe11 	ldr	x17, [x16, #4088]
  4007bc:	913fe210 	add	x16, x16, #0xff8
  4007c0:	d61f0220 	br	x17
  4007c4:	d503201f 	nop
  4007c8:	d503201f 	nop
  4007cc:	d503201f 	nop

00000000004007d0 <tzset@plt>:
  4007d0:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  4007d4:	f9400211 	ldr	x17, [x16]
  4007d8:	91000210 	add	x16, x16, #0x0
  4007dc:	d61f0220 	br	x17

00000000004007e0 <__libc_start_main@plt>:
  4007e0:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  4007e4:	f9400611 	ldr	x17, [x16, #8]
  4007e8:	91002210 	add	x16, x16, #0x8
  4007ec:	d61f0220 	br	x17

00000000004007f0 <putenv@plt>:
  4007f0:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  4007f4:	f9400a11 	ldr	x17, [x16, #16]
  4007f8:	91004210 	add	x16, x16, #0x10
  4007fc:	d61f0220 	br	x17

0000000000400800 <__gmon_start__@plt>:
  400800:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  400804:	f9400e11 	ldr	x17, [x16, #24]
  400808:	91006210 	add	x16, x16, #0x18
  40080c:	d61f0220 	br	x17

0000000000400810 <mktime@plt>:
  400810:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  400814:	f9401211 	ldr	x17, [x16, #32]
  400818:	91008210 	add	x16, x16, #0x20
  40081c:	d61f0220 	br	x17

0000000000400820 <abort@plt>:
  400820:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  400824:	f9401611 	ldr	x17, [x16, #40]
  400828:	9100a210 	add	x16, x16, #0x28
  40082c:	d61f0220 	br	x17

0000000000400830 <fwrite@plt>:
  400830:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  400834:	f9401a11 	ldr	x17, [x16, #48]
  400838:	9100c210 	add	x16, x16, #0x30
  40083c:	d61f0220 	br	x17

0000000000400840 <settimeofday@plt>:
  400840:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  400844:	f9401e11 	ldr	x17, [x16, #56]
  400848:	9100e210 	add	x16, x16, #0x38
  40084c:	d61f0220 	br	x17

0000000000400850 <__isoc99_sscanf@plt>:
  400850:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  400854:	f9402211 	ldr	x17, [x16, #64]
  400858:	91010210 	add	x16, x16, #0x40
  40085c:	d61f0220 	br	x17

0000000000400860 <printf@plt>:
  400860:	b0000090 	adrp	x16, 411000 <tzset@GLIBC_2.17>
  400864:	f9402611 	ldr	x17, [x16, #72]
  400868:	91012210 	add	x16, x16, #0x48
  40086c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400870 <_start>:
  400870:	d280001d 	mov	x29, #0x0                   	// #0
  400874:	d280001e 	mov	x30, #0x0                   	// #0
  400878:	aa0003e5 	mov	x5, x0
  40087c:	f94003e1 	ldr	x1, [sp]
  400880:	910023e2 	add	x2, sp, #0x8
  400884:	910003e6 	mov	x6, sp
  400888:	580000c0 	ldr	x0, 4008a0 <_start+0x30>
  40088c:	580000e3 	ldr	x3, 4008a8 <_start+0x38>
  400890:	58000104 	ldr	x4, 4008b0 <_start+0x40>
  400894:	97ffffd3 	bl	4007e0 <__libc_start_main@plt>
  400898:	97ffffe2 	bl	400820 <abort@plt>
  40089c:	00000000 	.inst	0x00000000 ; undefined
  4008a0:	00400adc 	.word	0x00400adc
  4008a4:	00000000 	.word	0x00000000
  4008a8:	00400af8 	.word	0x00400af8
  4008ac:	00000000 	.word	0x00000000
  4008b0:	00400b78 	.word	0x00400b78
  4008b4:	00000000 	.word	0x00000000

00000000004008b8 <call_weak_fn>:
  4008b8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf3b4>
  4008bc:	f947f000 	ldr	x0, [x0, #4064]
  4008c0:	b4000040 	cbz	x0, 4008c8 <call_weak_fn+0x10>
  4008c4:	17ffffcf 	b	400800 <__gmon_start__@plt>
  4008c8:	d65f03c0 	ret
  4008cc:	00000000 	.inst	0x00000000 ; undefined

00000000004008d0 <deregister_tm_clones>:
  4008d0:	b0000080 	adrp	x0, 411000 <tzset@GLIBC_2.17>
  4008d4:	91018000 	add	x0, x0, #0x60
  4008d8:	b0000081 	adrp	x1, 411000 <tzset@GLIBC_2.17>
  4008dc:	91018021 	add	x1, x1, #0x60
  4008e0:	eb00003f 	cmp	x1, x0
  4008e4:	540000a0 	b.eq	4008f8 <deregister_tm_clones+0x28>  // b.none
  4008e8:	90000001 	adrp	x1, 400000 <_init-0x790>
  4008ec:	f945cc21 	ldr	x1, [x1, #2968]
  4008f0:	b4000041 	cbz	x1, 4008f8 <deregister_tm_clones+0x28>
  4008f4:	d61f0020 	br	x1
  4008f8:	d65f03c0 	ret
  4008fc:	d503201f 	nop

0000000000400900 <register_tm_clones>:
  400900:	b0000080 	adrp	x0, 411000 <tzset@GLIBC_2.17>
  400904:	91018000 	add	x0, x0, #0x60
  400908:	b0000081 	adrp	x1, 411000 <tzset@GLIBC_2.17>
  40090c:	91018021 	add	x1, x1, #0x60
  400910:	cb000021 	sub	x1, x1, x0
  400914:	9343fc21 	asr	x1, x1, #3
  400918:	8b41fc21 	add	x1, x1, x1, lsr #63
  40091c:	9341fc21 	asr	x1, x1, #1
  400920:	b40000a1 	cbz	x1, 400934 <register_tm_clones+0x34>
  400924:	90000002 	adrp	x2, 400000 <_init-0x790>
  400928:	f945d042 	ldr	x2, [x2, #2976]
  40092c:	b4000042 	cbz	x2, 400934 <register_tm_clones+0x34>
  400930:	d61f0040 	br	x2
  400934:	d65f03c0 	ret

0000000000400938 <__do_global_dtors_aux>:
  400938:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40093c:	910003fd 	mov	x29, sp
  400940:	f9000bf3 	str	x19, [sp, #16]
  400944:	b0000093 	adrp	x19, 411000 <tzset@GLIBC_2.17>
  400948:	39422260 	ldrb	w0, [x19, #136]
  40094c:	35000080 	cbnz	w0, 40095c <__do_global_dtors_aux+0x24>
  400950:	97ffffe0 	bl	4008d0 <deregister_tm_clones>
  400954:	52800020 	mov	w0, #0x1                   	// #1
  400958:	39022260 	strb	w0, [x19, #136]
  40095c:	f9400bf3 	ldr	x19, [sp, #16]
  400960:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400964:	d65f03c0 	ret

0000000000400968 <frame_dummy>:
  400968:	17ffffe6 	b	400900 <register_tm_clones>

000000000040096c <settimeofday_test>:
  40096c:	a9b87bfd 	stp	x29, x30, [sp, #-128]!
  400970:	910003fd 	mov	x29, sp
  400974:	90000000 	adrp	x0, 400000 <_init-0x790>
  400978:	9130e000 	add	x0, x0, #0xc38
  40097c:	910163a2 	add	x2, x29, #0x58
  400980:	aa0003e3 	mov	x3, x0
  400984:	a9400460 	ldp	x0, x1, [x3]
  400988:	a9000440 	stp	x0, x1, [x2]
  40098c:	b9401060 	ldr	w0, [x3, #16]
  400990:	b9001040 	str	w0, [x2, #16]
  400994:	b9007fbf 	str	wzr, [x29, #124]
  400998:	910083a7 	add	x7, x29, #0x20
  40099c:	910083a0 	add	x0, x29, #0x20
  4009a0:	91001006 	add	x6, x0, #0x4
  4009a4:	910083a0 	add	x0, x29, #0x20
  4009a8:	91002005 	add	x5, x0, #0x8
  4009ac:	910083a0 	add	x0, x29, #0x20
  4009b0:	91003004 	add	x4, x0, #0xc
  4009b4:	910083a0 	add	x0, x29, #0x20
  4009b8:	91004003 	add	x3, x0, #0x10
  4009bc:	910083a0 	add	x0, x29, #0x20
  4009c0:	91005002 	add	x2, x0, #0x14
  4009c4:	90000000 	adrp	x0, 400000 <_init-0x790>
  4009c8:	912ea001 	add	x1, x0, #0xba8
  4009cc:	910163a0 	add	x0, x29, #0x58
  4009d0:	97ffffa0 	bl	400850 <__isoc99_sscanf@plt>
  4009d4:	b94037a0 	ldr	w0, [x29, #52]
  4009d8:	511f1800 	sub	w0, w0, #0x7c6
  4009dc:	b90037a0 	str	w0, [x29, #52]
  4009e0:	b94033a0 	ldr	w0, [x29, #48]
  4009e4:	51000400 	sub	w0, w0, #0x1
  4009e8:	b90033a0 	str	w0, [x29, #48]
  4009ec:	b9003bbf 	str	wzr, [x29, #56]
  4009f0:	b9003fbf 	str	wzr, [x29, #60]
  4009f4:	b90043bf 	str	wzr, [x29, #64]
  4009f8:	910083a0 	add	x0, x29, #0x20
  4009fc:	97ffff85 	bl	400810 <mktime@plt>
  400a00:	f9003ba0 	str	x0, [x29, #112]
  400a04:	d2912ce0 	mov	x0, #0x8967                	// #35175
  400a08:	f2ac3860 	movk	x0, #0x61c3, lsl #16
  400a0c:	f9000ba0 	str	x0, [x29, #16]
  400a10:	f9000fbf 	str	xzr, [x29, #24]
  400a14:	90000000 	adrp	x0, 400000 <_init-0x790>
  400a18:	912f0000 	add	x0, x0, #0xbc0
  400a1c:	97ffff75 	bl	4007f0 <putenv@plt>
  400a20:	90000000 	adrp	x0, 400000 <_init-0x790>
  400a24:	912f4000 	add	x0, x0, #0xbd0
  400a28:	97ffff72 	bl	4007f0 <putenv@plt>
  400a2c:	97ffff69 	bl	4007d0 <tzset@plt>
  400a30:	b0000080 	adrp	x0, 411000 <tzset@GLIBC_2.17>
  400a34:	9101a000 	add	x0, x0, #0x68
  400a38:	b9400001 	ldr	w1, [x0]
  400a3c:	90000000 	adrp	x0, 400000 <_init-0x790>
  400a40:	912f8000 	add	x0, x0, #0xbe0
  400a44:	97ffff87 	bl	400860 <printf@plt>
  400a48:	b0000080 	adrp	x0, 411000 <tzset@GLIBC_2.17>
  400a4c:	9101c000 	add	x0, x0, #0x70
  400a50:	f9400001 	ldr	x1, [x0]
  400a54:	90000000 	adrp	x0, 400000 <_init-0x790>
  400a58:	912fc000 	add	x0, x0, #0xbf0
  400a5c:	97ffff81 	bl	400860 <printf@plt>
  400a60:	b0000080 	adrp	x0, 411000 <tzset@GLIBC_2.17>
  400a64:	9101e000 	add	x0, x0, #0x78
  400a68:	f9400001 	ldr	x1, [x0]
  400a6c:	90000000 	adrp	x0, 400000 <_init-0x790>
  400a70:	91300000 	add	x0, x0, #0xc00
  400a74:	97ffff7b 	bl	400860 <printf@plt>
  400a78:	910043a0 	add	x0, x29, #0x10
  400a7c:	d2800001 	mov	x1, #0x0                   	// #0
  400a80:	97ffff70 	bl	400840 <settimeofday@plt>
  400a84:	b9007fa0 	str	w0, [x29, #124]
  400a88:	90000000 	adrp	x0, 400000 <_init-0x790>
  400a8c:	91304000 	add	x0, x0, #0xc10
  400a90:	b9407fa1 	ldr	w1, [x29, #124]
  400a94:	97ffff73 	bl	400860 <printf@plt>
  400a98:	b9407fa0 	ldr	w0, [x29, #124]
  400a9c:	7100001f 	cmp	w0, #0x0
  400aa0:	54000180 	b.eq	400ad0 <settimeofday_test+0x164>  // b.none
  400aa4:	b0000080 	adrp	x0, 411000 <tzset@GLIBC_2.17>
  400aa8:	91018000 	add	x0, x0, #0x60
  400aac:	f9400001 	ldr	x1, [x0]
  400ab0:	90000000 	adrp	x0, 400000 <_init-0x790>
  400ab4:	91308000 	add	x0, x0, #0xc20
  400ab8:	aa0103e3 	mov	x3, x1
  400abc:	d2800282 	mov	x2, #0x14                  	// #20
  400ac0:	d2800021 	mov	x1, #0x1                   	// #1
  400ac4:	97ffff5b 	bl	400830 <fwrite@plt>
  400ac8:	12800000 	mov	w0, #0xffffffff            	// #-1
  400acc:	14000002 	b	400ad4 <settimeofday_test+0x168>
  400ad0:	52800000 	mov	w0, #0x0                   	// #0
  400ad4:	a8c87bfd 	ldp	x29, x30, [sp], #128
  400ad8:	d65f03c0 	ret

0000000000400adc <main>:
  400adc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400ae0:	910003fd 	mov	x29, sp
  400ae4:	97ffffa2 	bl	40096c <settimeofday_test>
  400ae8:	d503201f 	nop
  400aec:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400af0:	d65f03c0 	ret
  400af4:	00000000 	.inst	0x00000000 ; undefined

0000000000400af8 <__libc_csu_init>:
  400af8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400afc:	910003fd 	mov	x29, sp
  400b00:	a901d7f4 	stp	x20, x21, [sp, #24]
  400b04:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf3b4>
  400b08:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf3b4>
  400b0c:	91374294 	add	x20, x20, #0xdd0
  400b10:	913722b5 	add	x21, x21, #0xdc8
  400b14:	a902dff6 	stp	x22, x23, [sp, #40]
  400b18:	cb150294 	sub	x20, x20, x21
  400b1c:	f9001ff8 	str	x24, [sp, #56]
  400b20:	2a0003f6 	mov	w22, w0
  400b24:	aa0103f7 	mov	x23, x1
  400b28:	9343fe94 	asr	x20, x20, #3
  400b2c:	aa0203f8 	mov	x24, x2
  400b30:	97ffff18 	bl	400790 <_init>
  400b34:	b4000194 	cbz	x20, 400b64 <__libc_csu_init+0x6c>
  400b38:	f9000bb3 	str	x19, [x29, #16]
  400b3c:	d2800013 	mov	x19, #0x0                   	// #0
  400b40:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400b44:	aa1803e2 	mov	x2, x24
  400b48:	aa1703e1 	mov	x1, x23
  400b4c:	2a1603e0 	mov	w0, w22
  400b50:	91000673 	add	x19, x19, #0x1
  400b54:	d63f0060 	blr	x3
  400b58:	eb13029f 	cmp	x20, x19
  400b5c:	54ffff21 	b.ne	400b40 <__libc_csu_init+0x48>  // b.any
  400b60:	f9400bb3 	ldr	x19, [x29, #16]
  400b64:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400b68:	a942dff6 	ldp	x22, x23, [sp, #40]
  400b6c:	f9401ff8 	ldr	x24, [sp, #56]
  400b70:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400b74:	d65f03c0 	ret

0000000000400b78 <__libc_csu_fini>:
  400b78:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400b7c <_fini>:
  400b7c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400b80:	910003fd 	mov	x29, sp
  400b84:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400b88:	d65f03c0 	ret
